Dependable High Performance Multiprocessor Silicon for Autonomous Systems

The seminar will be given by Riccardo Locatelli, Functional Safety Architect and Team Manager, Intel Corporation, as part of the course "Industrial Trends in Electronics M"

  • Date: 30 May 2022 from 09:30 to 10:30

  • Event location: Room 2.7A, viale Risorgimento 2, Bologna, and online on Microsoft Teams

  • Access Details: Free admission

About the speaker

Riccardo Locatelli received the Laurea degree (summa cum laude) in electronic engineering, and the related PhD degree from the University of Pisa, Italy, in 2000 and 2004, respectively. He was a visiting researcher with the European Space Agency, The Netherlands and the Advanced System Technology Laboratory of STMicroelectronics, France. From 2004 to 2017, he has been pioneering the Network on Chip concept and technology with STMicroelectronics, Grenoble, France, designing and introducing ST proprietary NoC solution into several chips. Since 2017 he is with Intel Corporation managing the deployment of Functional Safety features across current and future IPs and SoCs for IOT Group markets. He has published more than 30 papers in international journals and conference proceedings and he is the coauthor of a book. He has filed around 20 international patents on NoC and safety. He has been invited professor at Grenoble, Pisa and Bologna University.

Abstract

Autonomous systems in the edge markets are addressing multiple application domains; it is not only about automotive. Processors to run autonomous system functionalities require dependability and Functional Safety is a necessary layer. The talk will give fundamentals in FuSa and provides examples of high performance processor FuSa architecture solutions and challenges.