About the speaker
Dr. Yervant Zorian is a Chief Architect and Fellow at Synopsys, as well as President of Synopsys Armenia. Formerly, he was Vice President and Chief Scientist of Virage Logic, Chief Technologist at LogicVision, and a Distinguished Member of Technical Staff AT&T Bell Laboratories. He is currently the President of IEEE Test Technology Technical Council (TTTC), the founder and chair of the IEEE 1500 Standardization Working Group, the Editor-in-Chief Emeritus of the IEEE Design and Test of Computers and an Adjunct Professor at University of British Columbia. He served on the Board of Governors of Computer Society and CEDA, was the Vice President of IEEE Computer Society, and the General Chair of the 50th Design Automation Conference (DAC) and several other symposia and workshops. Dr. Zorian holds 35 US patents, has authored four books, published over 350 refereed papers and received numerous best paper awards. A Fellow of the IEEE since 1999, Dr. Zorian was the 2005 recipient of the prestigious Industrial Pioneer Award for his contribution to BIST, and the 2006 recipient of the IEEE Hans Karlsson Award for diplomacy. He received the IEEE Distinguished Services Award for leading the TTTC, the IEEE Meritorious Award for outstanding contributions to EDA, and in 2014, the Republic of Armenia's National Medal of Science. He received an MS degree in Computer Engineering from University of Southern California, a PhD in Electrical Engineering from McGill University, and an MBA from Wharton School of Business, University of Pennsylvania.
Abstract
Recent growth in utilizing AI Accelerators, in data centers and automotive SOCs have led to an explosion in the adoption of emerging technology nodes and 3DIC/chiplet packages. This keynote will first present today’s trends, then concentrate on resiliency challenges for such emerging SOCs, and then will discuss optimizing their health using advanced solutions, which are typically utilized for managing all the silicon lifecycle stages: from silicon debug in early bring up stage to shorten the time-to-market; to self-test and repair during volume production stage to improve quality and yield; to power-on self-test in the field to address aging defects; to in-system periodic checking in the field to improve functional safety; and finally to fault tolerance and error correction during the mission mode to address a range of transient errors. All of the above are realized by on-chip and off-chip data analytics.