All publications

Gã¼rkaynak, Frank K.; Schilling, Robert; Muehlberghuber, Michael; Conti, Francesco; Mangard, Stefan; Benini, Luca, Multi-core data analytics SoC with a flexible 1.76 Gbit/s AES-XTS cryptographic accelerator in 65 nm CMOS, in: ACM International Conference Proceeding Series, Association for Computing Machinery, 2017, pp. 19 - 24 (atti di: 4th Workshop on Cryptography and Security in Computing Systems, CS2 2017, swe, 2017) [Contribution to conference proceedings]

Conti, Francesco; Schilling, Robert; Schiavone, Pasquale Davide; Pullini, Antonio; Rossi, Davide; Gurkaynak, Frank Kagan; Muehlberghuber, Michael; Gautschi, Michael; Loi, Igor; Haugou, Germain; Mangard, Stefan; Benini, Luca, An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics, «IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS», 2017, 64, pp. 2481 - 2494 [Scientific article] Open Access

Di Mauro, Alfio; Conti, Francesco; Benini, Luca, An Ultra-Low Power Address-Event Sensor Interface for Energy-Proportional Time-To-Information Extraction, in: Proceedings - Design Automation Conference, Institute of Electrical and Electronics Engineers Inc., 2017, 128280, pp. 1 - 6 (atti di: 54th Annual Design Automation Conference, DAC 2017, usa, 2017) [Contribution to conference proceedings]

Rossi, Davide; Loi, Igor; Pullini, Antonio; Muller, Christoph; Burg, Andreas; Conti, Francesco; Benini, Luca; Flatresse, Philippe, A Self-Aware Architecture for PVT Compensation and Power Nap in Near Threshold Processors, «IEEE DESIGN & TEST», 2017, 34, pp. 46 - 53 [Scientific article]

Das, Satyajit; Rossi, Davide; Martin Kevin, J. M.; Coussy, Philippe; Benini, Luca, A 142MOPS/mW integrated programmable array accelerator for smart visual processing, in: Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), IEEE, 2017, pp. 1 - 4 (atti di: IEEE International Symposium on Circuits and Systems (ISCAS), Baltimore, MD, USA, May 28-31, 2017) [Contribution to conference proceedings]

Tim, Fleiner; Sayantan, Ghosh; Sabato, Mellone; Häussermann, Peter; Wiebren, Zijlstra, Assessment of physical (in)activity in acute dementia care: new insights and potentials of a sensor-based approach in geriatric psychiatry, in: Psychiatry of the 21st Century: Context, Controversies and Commitment, 2017, pp. 1 - 1 (atti di: WPA XVII WORLD CONGRESS OF PSYCHIATRY, Berlino, 8-12/10/2017) [Contribution to conference proceedings]

Shanawani, Mazen; Masotti, Diego; Costanzo, Alessandra, THz rectennas and their design rules, «ELECTRONICS», 2017, 6, pp. 1 - 33 [Scientific article]

Vogel, Pirmin; Marongiu, Andrea; Benini, Luca, Lightweight virtual memory support for zero-copy sharing of pointer-rich data structures in heterogeneous embedded SoCs, «IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS», 2017, 28, pp. 1947 - 1959 [Scientific article]

Palossi, Daniele; Marongiu, Andrea; Benini, Luca, Ultra low-power visual odometry for nano-scale unmanned aerial vehicles, in: Proceedings of the 2017 Design, Automation and Test in Europe, DATE 2017, Institute of Electrical and Electronics Engineers Inc., 2017, pp. 1647 - 1650 (atti di: 20th Design, Automation and Test in Europe, DATE 2017, SwissTech Convention Center, che, 2017) [Contribution to conference proceedings]

Forsberg, Bjorn; Marongiu, Andrea; Benini, Luca, GPUguard: Towards supporting a predictable execution model for heterogeneous SoC, in: Proceedings of the 2017 Design, Automation and Test in Europe, DATE 2017, Institute of Electrical and Electronics Engineers Inc., 2017, pp. 318 - 321 (atti di: 20th Design, Automation and Test in Europe, DATE 2017, SwissTech Convention Center, che, 2017) [Contribution to conference proceedings]

Palossi, Daniele; Marongiu, Andrea; Benini, Luca, On the accuracy of near-optimal CPU-based path planning for UAVs, in: Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems, SCOPES 2017, Association for Computing Machinery, Inc, 2017, pp. 85 - 88 (atti di: 20th International Workshop on Software and Compilers for Embedded Systems, SCOPES 2017, Schloss Rheinfels, deu, 2017) [Contribution to conference proceedings]

Vogel, Pirmin; Kurth, Andreas; Weinbuch, Johannes; Marongiu, Andrea; Benini, Luca, Efficient virtual memory sharing via on-accelerator page table walking in heterogeneous embedded SoCs, «ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS», 2017, 16, pp. 1 - 19 [Scientific article]

Forsberg, Bjã¶rn; Palossi, Daniele; Marongiu, Andrea; Benini, Luca, GPU-Accelerated Real-Time Path Planning and the Predictable Execution Model, in: Procedia Computer Science, Elsevier B.V., 2017, 108, pp. 2428 - 2432 (atti di: International Conference on Computational Science ICCS 2017, ETH Zurich, che, 2017) [Contribution to conference proceedings]

Martin, Omana; Marco, Padovani; Kreshnik, Veliu; Cecilia, Metra; Juergen, Alt; Rajesh, Galivanche, New Approaches for Power Binning of High Performance Microprocessors, «IEEE TRANSACTIONS ON COMPUTERS», 2017, 66, pp. 1159 - 1171 [Scientific article]

Mercati, Pietro; Paterna, Francesco; Bartolini, Andrea; Benini, Luca; Rosing, Tajana Å imuniÄ , WARM: Workload-Aware Reliability Management in Linux/Android, «IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS», 2017, 36, pp. 1557 - 1570 [Scientific article]

Bartolini, Andrea; Conficoni, Christian; Diversi, Roberto; Tilli, Andrea; Benini, Luca, Multiscale Thermal Management of Computing Systems - The MULTITHERMAN approach, in: IFAC-PapersOnLine, Amsterdam, Elsevier B.V, «IFAC-PAPERSONLINE», 2017, 50, pp. 6709 - 6716 (atti di: 20th IFAC Word Congress, Tolouse, France, 9-14 July 2017) [Contribution to conference proceedings]

Mangia, Mauro; Bortolotti, Daniele; Pareschi, Fabio; Bartolini, Andrea; Benini, Luca; Rovatti, Riccardo; Setti, Gianluca, Zeroing for HW-efficient compressed sensing architectures targeting data compression in wireless sensor networks, «MICROPROCESSORS AND MICROSYSTEMS», 2017, 48, pp. 69 - 79 [Scientific article]

Beneventi, Francesco; Bartolini, Andrea; Cavazzoni, Carlo; Benini, Luca, Continuous Learning of HPC Infrastructure Models using Big Data Analytics and In-Memory processing Tools, in: Proceedings of the 2017 Design, Automation and Test in Europe, DATE 2017, NY, Institute of Electrical and Electronics Engineers Inc., «PROCEEDINGS DESIGN, AUTOMATION, AND TEST IN EUROPE CONFERENCE AND EXHIBITION», 2017, pp. 1038 - 1043 (atti di: 20th Design, Automation and Test in Europe, DATE 2017, SwissTech Convention CenterSwisstech, Lausanne; Switzerland;, 27 - 31 March 2017) [Contribution to conference proceedings] Open Access

Jiang, Feng; Cacchiani, Valentina; Toth, Paolo, Train timetabling by skip-stop planning in highly congested lines, «TRANSPORTATION RESEARCH PART B-METHODOLOGICAL», 2017, 104, pp. 149 - 174 [Scientific article] Open Access

Cesarini, Daniele; Bartolini, Andrea; Benini, Luca, Benefits in Relaxing the Power Capping Constraint, in: Proceedings of the 1st Workshop on AutotuniNg and aDaptivity AppRoaches for Energy efficient HPC Systems, New York, NY,, ACM, 2017, pp. 1 - 6 (atti di: 1st Workshop on AutotuniNg and aDaptivity AppRoaches for Energy efficient HPC Systems, Portland, OR, USA, September 09 - 13, 2017) [Contribution to conference proceedings] Open Access