Multicore complex CPU, Functional Safety and AI

The seminar will be given by Riccardo Locatelli, Functional Safety Architect, Intel Corporation, as part of the course on "Sistemi Elettronici Ad Alta Affidabilità e Resilienza M."

  • Date: 12 December 2024 from 13:30 to 14:30

  • Event location: Room 4.2, viale Risorgimento 2, Bologna

  • Access Details: Free admission

About the speaker

Riccardo is with Intel Corporation since 2017 in the role of Functional Safety technical lead and engineering manager. He defines innovative FuSa architectures and he is in charge of HW/SW safety capabilities plumbed into the Intel SoC that address FuSa edge markets. In his previous role at STMicroelectronics he has been pioneering the Network on Chip concept designing and introducing the ST proprietary NoC solution into several chips. Riccardo received the Laurea degree in electronic engineering, and the related PhD degree from the University of Pisa, Italy, in 2000 and 2004, respectively.

Abstract

This talk will provide basics of Functional Safety in the context of multicore CPU for autonomous systems computing. Trends will also be reviewed with focus on AI versus safety.