Safety Architectures for Autonomous Systems

Seminario tenuto dall'Ing. Riccardo Locatelli, Functional Safety Architect, Intel Corporation, nell'ambito del corso "Sistemi Elettronici ad Alta Affidabilità M".

  • Data: 11 dicembre 2020 dalle 15:00 alle 17:00

  • Luogo: Online - Piattaforma Microsoft Teams

  • Modalità d'accesso: Ingresso libero

Abstract

Many edge markets are moving towards autonomous systems. Beyond automotive, several applications do require high performance computation as well as specific technologies enhancing the system dependability and quality. Functional Safety is a key asset in this context. The talk will address Functional Safety engineering practices and solutions, with a focus on HW/SW Safety architectures for high performance autonomous platforms.

About the speaker

Riccardo Locatelli received the Laurea degree (summa cum laude) in electronic engineering, and the related PhD degree from the University of Pisa, Italy, in 2000 and 2004, respectively.
In 1999, he was a research intern with the Microelectronics Section of the European Space Agency, The Netherlands.
From 2000 to 2002 he worked as digital designer for video architectures and VDSL applications at Pisa University Electronic Department.
He was a visiting researcher with the Advanced Search Technology Grenoble Laboratory of STMicroelectronics, Grenoble, France, in 2003.
From 2004 to 2017, he has been pioneering the Network on Chip concept and technology as main architect and team manager with STMicroelectronics, Grenoble, France, designing and introducing ST proprietary NoC solution into several chips.
Since 2017 he is with Intel Corporation managing the deployment of Functional Safety hardware support across current and future IPs and SoCs for IOT Group markets. He has published more than 30 papers in international journals and conference proceedings and he is the coauthor of a book.
He has filed around 20 international patents on NoC and safety. He has been invited professor at Grenoble University and Pisa University.

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