Abstract
Edge applications for autonomous systems require high performance computation and augmented dependability and quality. Silicon integrity is a key asset in this context and it enables efficient HW/SW safety architectures. The talk will introduce the high level market requirements and discuss the key ingredients of high performance safety architectures. Functional Safety engineering practices will be finally presented with focus on safety analysis.
About the speaker
Riccardo Locatelli received the Laurea degree (summa cum laude) in electronic engineering, and the related PhD degree from the University of Pisa, Italy, in 2000 and 2004, respectively. In 1999, he was a research intern with the Microelectronics Section of the European Space Agency, The Netherlands. From 2000 to 2002 he worked as digital designer for video architectures and VDSL applications at Pisa University Electronic Department. He was a visiting researcher with the Advanced Search Technology Grenoble Laboratory of STMicroelectronics, Grenoble, France, in 2003. From 2004 to 2017, he has been pioneering the Network on Chip concept and technology as main architect and team manager wit STMicroelectronics, Grenoble, France, designing and introducing ST proprietary NoC solution into several chips. Since 2017 he is with Intel Corporation managing the deployment of Functional Safety hardware support across current and future IPs and SoCs for IOT Group markets. He has published more than 30 papers in international journals and conference proceedings and he is the coauthor of a book. He has filed around 20 international patents on NoC and safety. He has been invited professor at Grenoble University and Pisa University.