Seminario: Manufacturing Test for Microelectronic Devices: Balancing Yield, Quality and Reliability

Il seminario sarà tenuto dal Dr. Juergen Alt, Intel Corporation, Germany, nell'ambito del corso "Sistemi Elettronici ad Alta Affidabilità M".

  • Data: 16 dicembre 2015 dalle 11:00 alle 13:00

  • Luogo: Aula 2.7a, Scuola di Ingegneria e Architettura, viale Risorgimento 2, Bologna

Contatto di riferimento:

About the speaker

Juergen Alt is with Intel Corporation based in Munich, Germany. He is responsible for Design-for-Test Methodology for Intel’s mobile business. Juergen is working in Design & Test, EDA-Software and Reliability since more than 20 years. In 1995 he received a PhD from University of Hannover, Germany and started his industrial career the same year with Siemens Semiconductors (later Infineon).

 

Abstract

This presentation guides you intro semiconductors - building blocks for all kinds of electronic equipment. Semiconductor industry has to master 2x complexity increase within a 2 years period. This increase is driven by Moore’s Law since 1965. Quality and Reliability are key challenges especially for most advanced technology nodes. Manufacturing test of semiconductor devices has to guarantee outgoing quality and balance it with business constraints like product’s yield. An industrial view on today’s problems and solution combined with an outlook to the future is given with this talk.